Royalty Report: Semiconductors, IC, Fabrication – Collection: 25919

License Grant

The Company hereby grants to the Licensee, its Subsidiaries and its Affiliates, a perpetual, non-cancelable, non-exclusive, world-wide, fully paid-up license to the Company Patents, including, without limitation, the right for the Licensee to make, have made, use, export, import, lease, offer to sell, sell or otherwise transfer Licensed Products within the scope of the claims of the Company Patents.
The Licensee will obtain a worldwide license to the Company's Clipper chip patents, high performance microprocessor.

License Property

The Clipper architecture used a simplified instruction set compared to earlier CISC architectures, but it did incorporate some more complicated instructions than were present in other contemporary RISC processors. These instructions were implemented in a so-called Macro Instruction ROM within the Clipper CPU. This scheme allowed the Clipper to have somewhat higher code density than other RISC CPUs.

'IHTC Patents' means (i) all U.S. patents issued for or claiming priority to or the benefit of the filing date of U.S. patent application serial numbers 06/704,497;06/704,499; 06/704,568; 06/794,248, together with all divisionals, continuations,continuations-in-part, extensions of said applications (including U.S. Patents 4,860,192,4,884,197, 4,899,275, 4,933,835 and 5,091,846) and (ii) all their counterparts outside the United States (including but not limited to the following European, Canadian and Japanese patents, respectively EP0196244 and EP0732656, CA1272301 and JP2083650), and (iii) any patent reissuing, divided, granted on reexamination or extended on any of the aforesaid patents.

License Grant

For the technology, Licensor shall grant a worldwide, personal, non-exclusive, non-transferable, non-assignable and revocable right and license to use, without the right to sublicense, transfer or convey such rights, in whole or in part, Licensors Technology, for the purposes of designing, modifying,   manufacturing, having manufactured, marketing, selling and otherwise disposing of integrated circuits which embody or are based upon part or all of Licensor Technology licensed by Licensor to Licensee and implemented in Designated Process Technology and which are not pin-compatible with Licensor Chips, in Licensee products, as components or Modules.

For the software, Licensor shall grant a world-wide, personal, non-exclusive, non-transferable, non-sublicenseable, non-assignable and revocable right and license, without any right to market, sublicense or distribute, to use, copy, and modify for Internal Use only and only with Licensor Chips in Designated Process Technology and/or Licensor Systems,  certain Licensor Source Code Software as set forth on the Source Code Use License Agreement.

Licensor shall grant a world-wide, personal, non-exclusive, non-transferable, fee-bearing, non assignable and revocable right and license to use for Internal Use and for sublicensing, copy for  Internal Use and for sublicensing, market, grant non-exclusive sublicenses for use and distribute  certain Licensor Binary Software,  as set forth on the Binary Software License Agreement all for use  only with Licensee Chips in Designated Process Technology and/or Licensor-based Systems.

For the Architecture License Software, Licensor shall grant a worldwide, personal, non-exclusive, non-transferable, non-sublicenseable, non-assignable and revocable right and license without any right to market, distribute or sublicense, to use, copy and modify, all for Internal Use only and only with Licensor Systems, certain Licensor Architecture License Software.

For Documentation rights, Licensor shall  grant a worldwide, personal, non-exclusive, fully-paid, non-transferable, non-assignable and revocable right and license, to use, modify, copy and distribute,  all for Internal Use only, without any right to market, copy or distribute outside of Licensee, Licensee Architecture License Documentation as set forth.

License Property

The Designate Process Technology means any technology for the design and manufacture of integrated circuit products that incorporates a type of circuit structure containing both p-channel and  n-channel MOS devices on the same silicon substrate (CMOS OR Bi-CMOS).

The licensed property includes Instruction Set and System Performance Simulator (SABLE), and Architecture Specification (superscalar) R4000 and R5000.

MIPS ARCHITECTURE – means the organization, structure, and content of any CPU or CPU support chips, or portions thereof, as designed and enhanced by MIPS, including but not limited to, MIPS Instruction Set (for example, the architecture set forth in the book entitled, MIPS RISC ARCHITECTURE) and interface specifications.

Field of Use

This agreement is for the integrated circuit industry.

License Grant

Licensor hereby grants to Licensee and Licensee hereby accepts a personal, nonexclusive, worldwide, revocable, non-transferable, and non-assignable right and license to make, have made, use, modify, market, sell and distribute the Licensor Chips provided that (a) Licensor Chips are implemented in CMOS and CMOS-Derivative Technologies, and such other process technologies as the parties may hereafter agree (the parties acknowledge that such other process technologies cannot include circuit design and mask layout of non-CMOS and non-CMOS derivative technologies not available to Licensee for license by Licensor); and (b) Licensor Chips are those to which Licensor has the right to license Licensee without the payment by Licensee of compensation to a third person, except that if payment of such compensation will enable Licensor to license such rights to Licensee, Licensor will use reasonable commercial efforts to acquire such rights for Licensee, and Licensee shall pay the minimally required compensation. Licensor represents that no such compensation is payable to a third person for Original Licensor Chips, Original Modified Licensor Chips, Original Superset Licensor Chips, and Original Unmodified Licensor Chips.

Licensor hereby grants to Licensee and Licensee hereby accepts a personal, non-exclusive, worldwide, revocable (only in accordance herein, non-transferable right and  license to use Licensor Tools for Licensees Internal Use only.

License Property

Licensor Chip(s) – means (a) those integrated circuit central processor product(s) using Licensor Technology and employing proprietary Licensor Architecture or Licensor Designs, in whole or in part;  (b) integrated circuit arithmetic co-processor product(s) designed by or on behalf of Licensor to connect with and operate with a Licensor Chip central processor unit; and (c) integrated circuit bus interface management product(s) designed by or on behalf of Licensor to connect with and operate  with a Licensor Chip central processor or Licensor Chip co-processor Notwithstanding the foregoing, nothing in this definition shall require Licensor, or be deemed to create an obligation on the part of Licensor, to create develop or acquire any particular Licensor Chip referred to above.  Licensor Chips do not include those custom  chips designed by or on behalf of Licensor exclusively for a third party, custom chips substantially funded by a third party,  Licensors  authorized original equipment  manufacturers, or its product.  By way of example only, the parties  acknowledge and agree that Licensor Chips do not include the Magic Carpet media co-processor or any graphics processor or central processor unit developed for Nintendo Co., Ltd., Nintendo of America Inc. or exclusively for Licensor.

Licensor Technology – means any patents, patent applications, mask work rights, copyrights, and other statutory rights which are necessary or required for any of the activities contemplated to be performed by Licensee pursuant to this Agreement including, but not limited to, designing, manufacturing, using, selling, installing, repairing or maintaining, the Licensor Chips, Licensor Systems, or Licensor Commercial Software which is owned by Licensor or licensed by Licensor from any third party as of the Effective Date or thereafter (except for the licenses from AT&T, the Regents of the, University of California, Sun Microsystems, and any other licenses with respect to which Licensor has no right, or must pay a royalty or other fee to grant licenses of the scope granted in the Agreement).  Licensor Technology includes the Licensor Architecture and Licensor Designs contained within any Licensor Chip.

Licensor Designs – means a  microprocessor  now or at any later time during the term of this Agreement  developed or co-developed by Licensor and licensable from Licensor by Licensor Semiconductor Partners (excluding those designs funded by a third party, developed substantially in their entirety on a custom basis for the use of such third party or Licensor and not generally made available to any other third party) employing the Licensor Architecture.  By way of example only, the parties acknowledge and agree that Licensor Designs do not include the Magic Carpet media co-processor or any graphics processor or central processor unit developed for Nintendo Co., Ltd., Nintendo of America Inc. or exclusively for Licensor.

Licensor Architecture – means those Licensor instruction set architectures for which Licensor offers  nonexclusive  licenses  to more  than one Licensor Semiconductor Partner for use in products for sale to the open market.  In general, Licensor Architecture relates to the RISC-based Licensor computer organization, structure and content, or portions thereof, as designed and enhanced by Licensor, including but not limited to, the Licensor I, Licensor II, Licensor III, Licensor IV, Licensor V, Licensor 16 and the MDMX instruction set architectures and interface specifications.

Field of Use

This agreement pertains to integrated circuit central processor product(s) in the Semiconductor industry.

License Grant

Licensor grants to TI a nonexclusive, worldwide, royalty-bearing license under the Licensed Patents.

License Property

'Digital Signal Processor' or 'DSP' means a type of microprocessor (i) which manipulates digital signals in real time, which are typically representative of analog voice, data or video signals, or (ii) which TI markets as a Digital Signal Processor or DSP.

'Licensed Patents' means U.S. Patents 5,560,028; 5,794,003; and 6,360,313.

'Licensed Products' means (i) TI Digital Signal Processors utilizing TI's TMS320C6000 architecture or structure or any derivative thereof, (ii) other TI products incorporating the same core architecture as TI's TMS320C6000 architecture or any derivative thereof, and (iii) any other TI DSP or other TI product (including combinations), any part of which is within the scope of any claim of any Licensed Patent.

Licensed Products specifically includes any general purpose microprocessor (other than a DSP), that is within the scope of any claim of any Licensed Patent, and which is used as the primary processor within a general purpose personal computer system, computer workstation system, or computer server system where such primary processor itself executes all the operating system software for the operation of computer software applications by an operator of the computer system ('General Purpose Microprocessor').

License Grant

United Kingdom Licensor and Hong Kong Licensee amend the terms and conditions for the ARM7TDMI-S annex (document number LEC-ANX-01223) (the Annex) to the technology license agreement document number LEC-TLA-00547 to include revision of the royalty rates.

Licensor hereby grants, to Licensee, a non-transferable (subject to the TLA), non-exclusive, world-wide license for the Term to; Technical Reference Documentation (i) use, copy, modify (solely to the extent necessary to reflect any permitted modifications in accordance with the provisions of this agreement or for incorporation into Licensee’s documentation), distribute and have distributed the Technical Reference Manuals; Licensor Compliant Core (ii) use and copy the Implementation and Integration Documentation only for the purposes of designing, having designed (subject to the provisions of the TLA) Licensor Compliant Products; (iii) use and copy the AVS only for the purposes of designing, having designed (subject to the provisions of the TLA) Licensor Compliant Products and Test Chips; (iv) use, copy and modify the Synthesisable RTL (solely for the purposes of scan insertion, buffer insertion, timing closure, targeting standard cell libraries, direct instantiations of cells for speed and power optimisation, and use of licensee specified BIST), only for the purposes of designing, having designed (subject to the provisions of the TLA) Licensor Compliant Products; (v) use, copy and modify the Implementation Scripts only for the purposes of designing, having designed (subject to the provisions of the TLA), Licensor Compliant Products; (vi) use, copy and modify the Functional and Integration Test only for the purposes of designing, having designed (subject to the provisions of the TLA), Licensor Compliant Products; (vii) use, copy and modify (solely for the purpose of and to the extent necessary to run the vectors on a simulator or tester) the Functional Test Vectors, only for the purposes of designing and having designed (subject to the provisions of the TLA), manufacturing and having manufactured (subject to the provisions of the TLA), testing and having tested (subject to the provisions of the TLA) Licensor Compliant Products; (viii) use, copy and modify the Validation and Verification Environment only for the purposes of designing and having designed (subject to the provisions of the TLA) Licensor Compliant Products and Test Chips; (ix) manufacture and have manufactured (subject to the provisions of the TLA) the Unique Licensor Compliant Products created under the licenses granted in agreement inclusive; (x) package and have packaged (subject to the provisions of the TLA), the Unique Licensor Compliant Products manufactured under the licenses granted in agreement; (xi) sell, supply and distribute encapsulated die of the Unique Licensor Compliant Products which have been manufactured under the licenses granted in agreement(ix); Models (xii) copy and use, internally and for third party support purposes, the Models and related documentation; (xiii) use, reproduce and distribute, and sub-license (subject to the terms of an End User License) the Use of the object code of the Models, solely for the purpose of developing Licensor Compliant Products; and (xiv) modify, reproduce, use and distribute, in connection with the Models, the documentation related thereto. Test Chips (xv) use, copy and modify; (a) the Test Chip Functional Test Vectors (solely for the purposes of and to the extent necessary to run the vectors on a simulator or tester; (b) the Test Chip Synthesisable RTL (solely for the purposes of scan insertion, buffer insertion, timing closure, targeting standard cell libraries, direct instantiations of cells for speed and power optimisation, and use of licensee specified BIST and (c) the Test Chip Synthesis Scripts, only for the purposes of designing, having designed (subject to the provisions of the TLA) Test Chips; (xvi) use and copy the Test Chip Documentation, only for the purposes of designing and having designed (subject to the provisions of the TLA) Test Chips; (xvii) manufacture and have manufactured (subject to the provisions of the TLA) the Test Chips created under the licenses granted in agreement.

Licensor hereby grants and the Licensee hereby accepts a non transferable and non-exclusive license to use the Model solely for the purpose of developing a product which incorporates a CPU manufactured under Licensor’s license from Licensor.

License Property

Licensor Compliant Product means an integrated circuit incorporating an Licensor Compliant Core.

Licensor Compliant Core means the ARM7TDM1-S microprocessor core.

ARM7TDM1-S core is a general-purpose 32-bit microprocessor.

Test Chip means for each Licensor Compliant Core a device which complies with the relevant Test Chip Documentation.

Field of Use

Field of use is for semiconductor technology using the microprocessor core to speed the flow of instructions to the processor.