Royalty Report: Semiconductors, Fabrication, Electrical & Electronics – Collection: 1550

$150.00

Curated Royalty Rate Report
Category: Technology Licenses, Created On: 2022-04-28, Record Count: 12

Description

This collection of transactions and supporting information was developed using our AI algorithm to curate similar royalty reports into a cohesive collection to support your licensing, transfer pricing or other transaction scenarios where documented royalty rates and/or deal terms are important.
Category: Technology Licenses
Created On: 2022-04-28
Record Count: 12

Primary Industries

  • Semiconductors
  • Fabrication
  • Electrical & Electronics
  • Test/Monitoring
  • IC
  • Integrated Circuits
  • Material Composite
  • Solar
  • Circuits
  • RAM
  • Computers & Office Equipment

IPSCIO Report Record List

Below you will find the records curated into this collection.  This summary includes the complete licensed property description so that you can review and determine if this collection covers the topics, technology or transaction type that is relevant for your needs.  The full report will include all relevant deal data such as the royalty base, agreement date, term description, royalty rates and other deal terms.  For reference, here is a sample of a full IPSCIO curated royalty rate report: Sample Report

IPSCIO Record ID: 1550

License Grant
The Company entered into an exclusive agreement to develop certain processes and technology related to chip stacking, certain fabrication processes and to build equipment for testing electronic integrated circuits.

IPSCIO Record ID: 8621

License Grant
The University hereby grants to the Licensee an exclusive as to all parties, including the University, world-wide, transferable license in the Field.

The Licensee was granted certain rights to technology from the University regarding aspects of semiconductors technology.  The Licensee restructure its license agreement of April 8, 2003 with the University. The parties confirmed that the licenses granted pursuant to the License Agreement are in full force and are irrevocable.

While the maintenance fee provisions of the License Agreement remain unchained, the parties agreed to restructure the payment provisions by reducing the royalty payment on amounts received from unaffiliated third parties in respect of the exploitation of the Intellectual Property defined in the License Agreement.

License Property
“Product” means any optoelectronic component or device for any product or any process in the Field, whose manufacture, use, sale or import would, absent the license granted to OPEL hereunder, infringe one or more claims of the Patent Rights. Product, as that term is defined herein shall not include products used in customer and strategic association or partner alpha or beta tests, samples and prototypes.
Field of Use
“Field” means all optical, electronic, and optoelectronic integrated circuit applications, including but not limited to components and devices for communications, computing, and imaging.

Licensee is the developer of the POET (Planar OptoElectronic Technology) platform for monolithic fabrication of integrated circuit devices containing both electronic and optical elements on a single semiconductor wafer. It is combining electronics and optics onto a single chip for massive improvements in size, power, speed and cost. The Licensee's core principles have been in development at the University. The Licensee has developed a proprietary process that addresses the deficiencies of speed, size, integration, power and cost efficiency associated with current semiconductor manufacturing technologies.  The planar optoelectronic technology (POET) platform for monolithic fabrication of integrated electronic and optical devices on a single semiconductor wafer.

IPSCIO Record ID: 2756

License Grant
The Company entered into a License Agreement to license certain of the Company’s proprietary wafer production process technologies subject to certain restrictions.  The parties also entered into an Asset Purchase Agreement for certain wafer fabrication equipment.

IPSCIO Record ID: 4699

License Grant
Company A entered into a sublicense agreement with an  undisclosed Company B which allows the Company B to use certain technology licensed by Company A.  Under the agreement, the Company B shall use its best efforts to introduce products and processes to the commercial market using the licensed technology.
Field of Use
The Agreement is related to the new technological field of molecular electronics.  Molecular electronics is the technology of using single molecules to form components of electronic devices.

IPSCIO Record ID: 230774

License Grant
The Parties agree to jointly develop semiconductor manufacturing process technology based on Licensor’s “S” high performance technology roadmap on commercially available wafers that meet the requirements (referred to as Strategic Technology Objectives) in accordance with the schedule (hereinafter referred to as Development Schedule). The Parties agree that the process technology so developed, shall be high performance, leading edge technology and, to the extent consistent with the Strategic Technology Objectives, shall be cost efficient. Any modification to such Strategic Technology Objectives or Development Schedule requires the mutual agreement of the Parties. For the avoidance of doubt, none of the Process Development Projects shall include the development of i) Proprietary Tools, ii) Packaging Technology, iii) Mask Fabrication and Photoresist Technology, iv) Memory, v) SiGe Technology, vi) Chip Designs, or vii) Post-Silicon Devices.
License Property
Semiconductor Product means a component that contains an Integrated Circuit on a single or multichip module that incorporates a means of connecting those Integrated Circuits with other electronic elements (active or passive) and/or means to make external electrical connections to such elements, but which excludes any means for a user to operate the functions therein (e.g., buttons, switches, sensors).

Licensed Product means Integrated Circuits that include Bulk CMOS Information, Industry Standard Information, High Performance Device Information, SOI Device Information, or any combination thereof, other than Foundry Products.

Integrated Circuit means an integral unit formed on a semiconductor substrate including a plurality of active and/or passive circuit elements formed at least in part of semiconductor material. For clarity, Integrated Circuit shall include charge-coupled devices (“CCDs”).

Bulk CMOS Information means those aspects of Background Know-How and Specific Results that are (i) directed to Lithography and BEOL, and/or (ii) selected by Licensor either for incorporation into an Licensor Bulk CMOS process or otherwise pursuant to this agreement.

Industry Standard Information means those aspects of Background Know-How and Specific Results that are (i) directed to Lithography and BEOL, or (ii) applicable to Industry Standard CMOS and selected by Licensor either for incorporation into an Licensor Industry Standard CMOS process or otherwise selected pursuant to this agreement.

High Performance Device Information means Background Know-How and Specific Results pertaining to all process methods, steps, and structures created on substrates, not including SOI Device Information. Bulk CMOS Information or Industry Standard Information.

SOI Device Information means Background Know-How and Specific Results pertaining to all process methods, steps, and structures created on commercially available SOI Wafers other than Bulk CMOS or Industry Standard Information.

Field of Use
This agreement pertains to the semiconductor industry.

IPSCIO Record ID: 7494

License Grant
The Licensor hereby grants to the Licensee and its affiliates a royalty bearing, paid up, non-exclusive, worldwide license under Licensor Background Technology and Licensor Development Technology to make, have made, use, sell, lease, offer for sale, offer for lease, import, and Otherwise Dispose of Licensed Products and Licensed Processes in the Field, limited to the Military Field of Use. The Licensor also grants to the Licensor the right to grant sublicenses, of the same scope (and for no longer than the term of) as the license for Licensed Products and Licensed Processes granted herein to the Licensee, to third parties.
License Property
The proprietary technology relates to integrated electronics and photonics devices (optoelectronic) on substrates, referred to as POET Technology. The POET (Planar Opto Electronic Technology) platform is a patented semiconductor fabrication process that uses gallium arsenide technology to combine electronic and optical elements on a single integrated circuit.
Field of Use
The field of use includes the information, processes, methods, devices and apparatus involved in the technology of making, designing or using integrated electronics and optoelectronic semiconductor devices on Gallium Arsenide substrates.

Gallium arsenide (GaAs) is a compound of the elements gallium and arsenic. It is a III/V semiconductor, and is used in the manufacture of devices such as microwave frequency integrated circuits, monolithic microwave integrated circuits, infrared light-emitting diodes, laser diodes, solar cells and optical windows.

IPSCIO Record ID: 203510

License Grant
Licensor grants a non-exclusive, perpetual, worldwide, irrevocable license to use the Bulk CMOS Information and portions of Specific Results other than those portions which Licensee uses exclusively to produce the highest performing thirty percent (30%} of wafers manufactured in the applicable technology generation (e.g. 45nm, 32nm) in any given quarter for the purpose of researching, developing, engineering and manufacturing up to one thousand (1000) 300mm wafers, other than SOI Wafers, per week in 65nm, 45nm and/or 32 nm technology, including the right to sell, market, distribute or otherwise dispose of such wafers to Third Parties, provided that such licensed wafers manufactured using the aforementioned portions of Specific Results shall not include high performance microprocessors intended for use in high performance enterprise Servers.

After September 30, 2003, Licensee may exercise the sublicensing option. If Bump Technology is established as a Process Development Project,  Licensor grants Licensee the right to disclose and sublicense the process technology developed by Licensor and Licensee under this Agreement including SOI Device Information, High Performance Device Information and Bulk CMOS and Industry Standard CMOS Information and Pre-TO Information, subject to the following AMO may sublicense no more than two (2) JMP for a maximum of a total of two (2) joint manufacturing facilities with a combined maximum of 20,000 300 mm wafers per month for such technology consumed by, or supplied to the Joint Manufacturing Partners (JMP).

License Property
The technology is leading edge semiconductor manufacturing processes.

The Licensed Product means Integrated Circuits that include Bulle CMOS Information, Industry Standard Information, High Performance Device Information (excluding eDRAM Technology), SOI Device Information (excluding eDRAM Technology), or any combination thereof, other than Foundry Products.

“Chip Design(s)” means any design of one or more Integrated Circuits and/or Semiconductor Products, including (by way of example and not limitation) random access memory (RAM)s, read only memory (ROM)s, microprocessors, ASICs and other logic designs, and analog circuitry; provided, however, that “Chip Designs” shall not include (i) alignment marks or test structures and associated layout and data used in the Process Development Projects for process development, (ii) process kerf test structures, layout, and data of the test chip(s) (including SRAM macro cells and eDRAM macros) as well as such test chips themselves used for the development work of the Process Development Projects unless specifically excluded (for the avoidance of doubt, this phrase means that such structures or macros that are specifically designated as owner proprietary shall not be considered Specific Results), (iii) other product designs (including eDRAM macros) as mutually agreed by the Parties to be used as qualification vehicles in the Process Development Projects, or (iv) ESD protection devices as used in the Project Test Sites and ESD groundrules and models as defined in the Design Manual. For the avoidance of doubt, all of (i) through (iv) above shall be treated as Specific Results to the extent utilized in a Process Development Project.

“CMOS 10S” means a 90 nanometer CMOS logic fabrication process.

“Embedded DRAM” or “eDRAM” means a device that either (i) primarily carries out logic functions, and includes one or more dynamic random access memory (DRAM) cells embedded within logic circuitry on the same semiconductor substrate, or (ii) primarily carries out memory functions, and includes one or more DRAM cells in combination with a static random access memory (SRAM) array on the same semiconductor substrate (including an array of SRAM cells linked with bit lines, word lines, sense amplifiers and decoders).

“Integrated Circuit” means an integral unit formed on a semiconductor substrate including a plurality of active and/or passive circuit elements formed at least in part of semiconductor material. For clarity, “Integrated Circuit” shall include charge-coupled devices (“CCDs”).

“Lithography” shall mean those aspects of Background Know-How and Specific Results directed to (a) process technology-dependent ground rules or process technology-dependent special rules for shapes replication as developed by the Parties for the generation of photomasks used for development and qualification of a semiconductor process technology in the Process Development Projects, (b) resolution enhancement techniques specifically created pursuant to the Process Development Projects to generate mask build data, (c) such photomasks themselves and the data files used therefor as are used in the Process Development Projects, (d) lithography process sequence as utilized in the Process Development Projects, and (e) mask data generation sequence as utilized in the Process Development Projects.

Field of Use
This agreement is for semiconductor industry.

IPSCIO Record ID: 202870

License Grant
For the Technology Licensor grants a non-exclusive, non-transferable, worldwide right and license under all of Licensors copyright, patent, trade secret, mask work, know how and other intellectual property rights in the Licensed Technology
– to design and develop, and engage Contractors to design and develop, modifications to and derivatives of the Licensed Technology for the purpose of creating Licensed Chips
– to use and engage third-party contractors to use the Licensed Technology, including such modifications and derivatives, in the design and development of Licensed Chips; and
– to manufacture, have manufactured, sell and otherwise distribute Licensed Chips.

For the Trademark Licensor grants a non-exclusive, non-transferable, worldwide right and license to use Trademarks in Licensees marketing, sale and distribution of Licensed Chips.

License Property
Licensor develops video processing and image enhancement technologies and designs, develops and manufactures products, including integrated circuits, for video applications.

'Trademarks' means Faroudjas logos and other trademarks as such marks vary in appearance and/or style from time to time.

The Parties are interested in working together to combine Licenor video processing and image enhancement technologies and expertise with Licenee's ASIC design and fabrication and display controller technologies and expertise, to provide reasonably priced, high-quality chip solutions for manufacturers of flat panel displays and other display devices.

Field of Use
Licensee intend to incorporate Licensor's technologies into our proprietary display processing solutions to create a video solution for the mass television market by combining Licensor's decoding, deinterlacing and image algorithms with our technology.

Licensee designs, develops, manufactures and markets application specific integrated circuits primarily for the flat panel display market.

IPSCIO Record ID: 27308

License Grant
The Company grants worldwide, nontransferable, nonexclusive and royalty-free license to Japanese Licensee of the ProASIC Technology for the development, modification, manufacturing, use and sale by Rohm of Standard ProASIC Products down to 0.35 micron with no limitation on density.
License Property
The Company has developed proprietary ProASIC Technology and has applied this ProASIC Technology in the design, manufacture, marketing and selling of its Standard ProASIC Products and licensing the ProASIC Technology.

'ASICMAKER' means the proprietary hardware programmer developed by Gatefield for programming GateField ProASIC Products. 'EMBEDDED APPLICATIONS' means the integration of GateField's ProASIC Technology as a subset of a silicon device in the same chip.

'GATEFIELD PROASIC TECHNOLOGY' or 'PROASIC TECHNOLOGY' means the proprietary ProASIC technology developed and owned by GateField including the architecture, switch cell design and operation, programming logic, analog and high voltage circuit design, simulation, verification and testing, and methodologies, but excluding all software except for the architectural file generation software which shall be included.

'GATEFIELD'S CURRENT PROASIC PRODUCTS' means GateField's standard field programmable gate array GF100K, GF250F and GF260F Product families utilizing GateField ProASIC technology as specified in GateField's current product list.

ProASIC Product or ProASIC Technology means the proprietary ProASIC technology developed and owned by Licensor including the architecture, switch cell design and operation, programming logic, analog and high voltage circuit design, simulation, verification and testing, and methodologies, but excluding all software except for the architectural file generation software which shall be included.

ProASIC Chip on Chip Products means the application of Licensor's Standard ProASIC Products with other silicon products directly placed on the mother chip utilizing Rohm's Chip on Chip packaging technology as developed by Rohm including, but not limited to the drawing attached hereto as Attachment A, as an example.

ProASIC Technology on the chip to the total chip area for any Embedded Applications; application specific integrated circuit ('ASIC') technology; ProASIC–are based on two proprietary and patented technologies a flash-based switching element and a fine-grained, gate array-like ProASIC architecture.

The Company believes that the principal advantages of its products over alternative SRAM-based and antifuse devices are smaller chip size for the same geometries; reprogrammability and non-volatility; and the ability to use a standard electronic design automation (EDA) ASIC design flow.

Field of Use
Licensee shall have the right to market and sell the Standard ProASIC Products, Version 4p2 ASICmaster Software Licenses and ASICmaker under the ProASIC trademark.  Licensee agrees to use the ProASIC trademark on all Standard ProASIC Products, ASICmaker, Embedded Applications, ProASIC Chip on Chip Products and copies of the Version 4p2  ASICmaster Software, including all documentation and collateral material.

IPSCIO Record ID: 6727

License Grant
The Parties have agreed to the joint development of semiconductor apparatus and processes relating to plating technology for advanced packaging and integration solutions in semiconductor processing and manufacturing. The Licensor has granted a license under its intellectual property rights to develop, make, have made and sell certain products.
License Property
Packaging Technology means any process, procedure, software, or hardware tools used in the packaging of Integrated Circuit products into single-chip packages, multi-chip packages, or any other higher levels of assembly.

IPSCIO Record ID: 28181

License Grant
The Licensor  grants total exclusivity to the Licensee to advertise, market, and sell the Product Line under the Licensee brand, to issue new product announcements and press releases.

The Licensor will provide the Licensee with one complete sample of each finished product (set) and will authorize the Licensee to pursue and lead future product development and apply for Government R&D funding for development of Millimeter-wave calibrated test probes and test platforms.  The Licensor will manufacture all necessary parts for the development of Millimeter-wave test probes and test platforms.

License Property
RF/Microwave Test and Measurement industry for low-cost high frequency calibrated test probe products and related test platforms and accessories.
Field of Use
Both Parties will use their core competencies, technologies, and resources to develop, manufacture, and market a unique portfolio of industry’s first low cost RF/Microwave and Millimeter-wave calibrated test probes and related universal test platforms as alternative commercial products to conventional expensive custom test solutions.

The new line of test probe products for the RF/Microwave Test and Measurement (“T&M”) industry products and solutions are designed for daily use by thousands of electronic and wireless engineers around the world and could reduce test and measurement time from days and weeks to minutes. The Company expects a diverse customer base which target end users in the areas of research, product design and development, component/device design and development, semiconductor chip and integrated circuit design and development, production testing, incoming inspection and quality control.

RF/Microwave products support a variety of market segments including defense and aerospace; mobile wireless infrastructure networks; multimedia devices; household appliances such as microwave ovens, set top boxes and entertainment systems; public safety/homeland security communications; broadcast systems; automotive sensors; and other markets.

IPSCIO Record ID: 332238

License Grant
Licensor hereby grants to Japanese Licensee a worldwide license, without the right to sublicense except as provided by this Agreement, to use, improve and modify the Licensor Licensed Technology and Licensor Improvements solely for the purpose of permitting Licensee to use, design and develop the Fusion HF/DS test head for the CT Digital Channels, including use of Know-how for integration of the Fusion HF/DS test head with the CT Digital Channels, as more fully described in this Agreement. The Licensor Licensed Technology and Licensor Improvements necessary to enable Licensee to perform the foregoing shall be delivered promptly to Licensee after the execution of this Agreement.

Licensor hereby grants to Licensee an exclusive royalty-bearing license as provided in this Agreement in the Territory of the Licensor Licensed Technology and Licensor Improvements to use, manufacture, have made, market, sell, lease, improve, repair or otherwise dispose of Fusion Test Systems (and parts therefor) including, Fusion AC and HT when the option referenced in this Agreement is exercised, subject to the limitations hereinafter described or the conditions set forth in this Agreement.

License Property
Product name is 'Fusion(TM)' that offers a broad range of test capabilities including advanced mixed signal, high-speed digital, digital signal processing, RF wireless, embedded memory, power, and time measurement.

Fusion Test Systems shall mean the single platform test systems offering a broad range of test capabilities, including some or all of the following advanced mixed-signal, high-speed digital, digital signal processing, RF wireless, embedded memory, power, and time measurement. Fusion Test Systems offer a broad range of test configurations for integrated circuits ranging from VLSI digital to systems-on-a-chip. Fusion Test Systems include, without limitation, the HF, DS, HT and AC configurations (with an example of each configuration generally described in this Agreement, the Fusion Test Systems incorporating the CT Digital Channels and Improvements thereto.

CT Digital Channels shall mean the Licensee-developed digital channels derived from the Licensor VX250 digital modules in accordance with the LDA to be used in the Fusion HF Test System, and shall have the technical specifications set forth in this Agreement.

Licensor Licensed Technology shall mean the Licensor Know-how, Licensor Patents and all technology of Licensor and Licensors Affiliates existing as of the Effective Date or during the term hereof, described and defined by Licensors or such Affiliates documentation including, without limitation, schematics, drawings, production specifications relating to Fusion Test Systems. The Licensor Licensed Technology includes, without limitation, the documentation, schematics, drawings, product specifications relating to the CT Digital Channels which are necessary or useful in respect of development of the CT Digital Channels as set forth in this Agreement. The term Licensor Licensed Technology shall exclude all Mixed Signal Technology except as otherwise provided in this Agreement. The Licensor Licensed Technology excludes all technology owned by Persons solely or jointly other than Licensor, or its Affiliates, which Licensor does not have the right to sublicense without consent of any third Person or payment of royalties.

Licensor is a provider of semiconductor test solutions.

Field of Use
Field of use is for test capabilities including advanced mixed signal, high-speed digital, digital signal processing, RF wireless, embedded memory, power, and time measurement.

Licensee manufactures and markets semiconductor test equipment and electronic measuring systems.

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