Royalty Report: Fabrication, Semiconductors, Solar – Collection: 145414

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Curated Royalty Rate Report
Category: Technology Licenses, Created On: 2022-04-28, Record Count: 20

Description

This collection of transactions and supporting information was developed using our AI algorithm to curate similar royalty reports into a cohesive collection to support your licensing, transfer pricing or other transaction scenarios where documented royalty rates and/or deal terms are important.
Category: Technology Licenses
Created On: 2022-04-28
Record Count: 20

Primary Industries

  • Fabrication
  • Semiconductors
  • Solar
  • Energy & Environment
  • Coating
  • Energy Resources & Svcs
  • Alternative and Renewable Energy
  • Material Composite
  • IC
  • Packaging & Containers
  • Machinery
  • Lithography
  • Test/Monitoring

IPSCIO Report Record List

Below you will find the records curated into this collection.  This summary includes the complete licensed property description so that you can review and determine if this collection covers the topics, technology or transaction type that is relevant for your needs.  The full report will include all relevant deal data such as the royalty base, agreement date, term description, royalty rates and other deal terms.  For reference, here is a sample of a full IPSCIO curated royalty rate report: Sample Report

IPSCIO Record ID: 145414

License Grant
The License from the Licensor is exclusive and worldwide until a certain royalty has been  paid.
License Property
This licensing  agreement covers the manufacture and sale of SiC wafers worldwide under the technical direction of the Russian scientists who developed the technology.  

Silicon carbide (SiC), also known as carborundum is a semiconductor containing silicon and carbon.

SiC is unique in that  semiconductor devices made from it can operate at high temperatures, high voltages and high frequencies, and it can enable electro-optical  applications in the blue light spectrum.

Field of Use
Licensee SiC production process includes the Licensor  technology.

IPSCIO Record ID: 203449

License Grant
The United Kingdom Licensor desires to grant a license to certain Licensor technology, know-how, plans and designs related to
(1) the manufacture of SiC Fiber for use in the PV Field, which license shall be exclusive inside the PV Field, and
(2) the construction and operation of a SiC Fiber factory and perform related knowledge transfer and other services on behalf of Licensee.

Licensor grants an irrevocable, perpetual, worldwide, transferable, sublicensable right and license under the Licensor IP within the PV Field only to
(i) Exploit SiC Fiber,
(ii) Construct and/or Operate the Licensee Facilities and
(iii) copy, distribute, display, perform and modify the Licensor IP for the purpose of engaging in the activities described.
The license granted shall be exclusive, even as to Licensor and its Affiliates, in the PV Field.

License Property
The patents include SIC base CVD process using CO2, and, C coating process.  SiC Fiber means a mono filament produced by the growth of silicon carbide on a substrate filament by chemical vapor deposition, being monofilaments usually greater than 70 microns diameter.

SiC Fiber is a 10 µm diameter crystalline silicon carbide (SiC) fiber with the highest temperature capability of any available.

Field of Use
The PV Field means the field of photovoltaics, solar power or any similar field of Technology that relates to the conversion of electromagnetic radiation (e.g., sunlight) directly into electricity, and, any field of Technology, including so-called String Ribbon Technology, that relates to a technique in which a sheet of material, including semiconductor material (e.g., silicon, germanium, etc.), metals (e.g., palladium, platinum, etc.), salts and/or certain man-made gemstones are grown directly from the molten stage, whether the sheet is grown in a vertical or horizontal direction.

IPSCIO Record ID: 27206

License Grant
The Company agrees to grant to a Korean company the right to a processes involving technology, equipment design, and other intangible assets and property rights of value, all of which are useful with respect to the manufacture of Silicon Wafers.
License Property
The Company has developed over the years and possesses processes involving technology, equipment design, and other intangible assets and property rights of value, all of which are useful with respect to the manufacture of Silicon Wafers (as hereinafter defined) and certain value added features such as epitaxial layers.
Field of Use
Field of this Agreement means Silicon Wafers and processes, apparatus, equipment, and materials useful in producing Silicon Wafers consistent with the commercial requirements of PHC.

The Field of this Agreement shall not include processes, apparatus, equipment, and materials useful in producing polycrystal Silicon.

IPSCIO Record ID: 203395

License Grant
Licensor grants a worldwide, nonexclusive license, revocable within limitations, under Licensors trade secret rights in the Licensed Process to make, import, export and sell Licensed Products.

Concurrently with this Agreement, the Parties are entering into an agreement defining the joint development of an enhanced process for implanting silicon wafers with oxygen and/or other ions and annealing such wafers.

License Property
Licensor has developed an improved method of implantation and annealing.

The Licensed Process shall mean the process for Implanting silicon wafers with oxygen and annealing, as practiced for commercial production in Licensors New York state facility, referred to as Routes 7NOO, 7VOO, 7AOO and 2VOO. Licensor represents that the twenty (20) wafers delivered to Licensee on or about November 10, 2000 were Implanted and annealed with the Licensed Process. The Licensed Process shall include Licensor Improvements only if such Improvements are subsequently licensed to Licensee. The Licensed Process shall further include the Enhanced Process, as defined in the Joint Development Agreement.

'Licensed Product' shall mean (a) silicon wafers or substrates implanted with oxygen and annealed according to, with the aid of, based on or using information disclosed hereunder (including the Licensed Process) that, as of the date of disclosure, is not excluded from the obligations of confidentiality by the provisions of Section 4.6; and (b) semiconductor devices and integrated circuits formed on silicon substrates licensed according to the preceding clause.

Field of Use
The Licensee has expertise in products for the implantation and annealing of semiconductor wafers with oxygen.

IPSCIO Record ID: 291104

License Grant
The Parties previously entered into three (3) technology license agreements relating to a technology known as C-4 plating technology in which certain license rights were granted to Licensee.  The Parties desire to extend the license rights previously granted.

Licensor extends the license rights granted in the C-4 Agreements for Licensee to perform Bumping on 300mm semiconductor wafers solely for Licensee only in the Dresden Facility, manufacture Licensed Products solely for Licensee only in the Dresden Facility using Bumping on 300mm semiconductor wafers, use solely for Licensee Licensed Products only in the Dresden Facility using Bumping on 300mm semiconductor wafers, sell and have sold worldwide solely under the Licensee brand name Licensed Products manufactured using Bumping on 300mm semiconductor wafers, and manufacture only in the Dresden Facility and have manufactured by Another Manufacturer for Licensee’s internal use only, any apparatus designed or modified to implement Bumping of 300mm semiconductor wafers.

Licensor grants the right to use the Licensed Technology to perform Bumping of 200mm semiconductor wafers for third parties.

The license rights extended to Licensee are nonexclusive, nontransferable and revocable.

License Property
Bumping shall have the meaning in the C-4 Plating Technology Transfer and Licensing Agreement.  Typically, Wafer bumping is an essential to flipchip or board level semiconductor packaging. Bumping is an advanced wafer level process technology where “bumps” or “balls” made of solder are formed on the wafers in a whole wafer form before the wafer is being diced into individual chips.
Field of Use
The agreement relates to the semiconductor industry.

IPSCIO Record ID: 328

License Grant
Japanese Licensor hereby grants to Licensee the exclusive License under the Patents, Technical Information and Intellectual Property Rights to manufacture, use, offer for sale, sell, import and/or lease the Products in the territory; provided, however, Licensee agrees not to manufacture any of the three Products listed in this Agreement at any time on or prior to June 30, 2006; provided further, however, that Licensee may start on the effective date to manufacture, use, offer for sale, sell, import and/or lease in the territory all subsystems related to any Products, including, but not limited to, the Nison Vesper submodule. For the avoidance of doubt, Licensor acknowledges and agrees that the License granted to Licensee under this Agreement includes the right of the Licensee to subLicense to any purchaser of the Products the right to use (but not manufacture) the Patents, Technical Information and Intellectual Property Rights.
License Property
Licensor was incorporated to, among other things, manufacture and distribute certain products and systems of Licensee in Japan in accordance with a Shareholders Agreement dated June 5, 1991.  This license is a result of Licensor buying a portion of the business of a semiconductor manufacturing equipment business and licensing back rights to Licensee.

The parties agree that the definition of Products includes subsystems related to the products (e.g. the Nison Vesper submodule) only to the extent such subsystems are incorporated in Products sold by Licensee to end-users of the Products and not to original equipment manufacturers.  Three products are covered by this agreement Spin Processor CENOTE, a single wafer wet station; Best, a wafer backside3 etcher, and Wet Station, an immersion process system.

Patent

Title
No.
number

number
Country

1
Method of recirculation of high temperature etching solution
63–248757
02–096334

1653241
Japan

2
Cleaning/ rinsing vessel for semiconductor wafer
03–350731
05–166787

2013691
Japan

3
Method for refinig etchant
05–253672
07–086260

3072876
Japan

4
Single wafer spin etching method
07–104581
08–279485

3459137
Japan

5
Etching method with hot phosphoric acid
07–216528
09–045660

3459141
Japan

6
Composition measuring method for buffered hydrofluoric acid for semiconductor wafer etching
07–163075
08–334461

N/A
Japan

7
Regeneration treatment apparatus for etchant and etching apparatus using the same
10–095836
11–293479

N/A
Japan

8
Cleaning apparatus
11–199868
2001–028356

N/A
Japan

9
Filter device with bellows damper and chemical–circulation treatment device for semiconductor wafer using the same
11–222204
2001–046815

N/A
Japan

10
Semiconductor wafer cleaning system
11–234855
2001–060574

N/A
Japan

11
Method of etching semiconductor wafer
11–271065
2001–093876

N/A
Japan

12
Device and method for etching semiconductor wafer
11–314794
2001–135611

N/A
Japan

13
Scrub cleaning device
2000–044343
2001–237209

N/A
Japan

14
Cleaning Equipment of wafer
2000–274592
2002–093764

N/A
Japan

15
Equipment and method for processing solution for semiconductor wafer
2001–009915
2002–217165

N/A
Japan

16
Wafer–cleaning device
2001–158580
2002–353183

N/A
Japan

17
The apparatus and the method of etching wafer
2002–42120
2003–243353

N/A
Japan

18
The apparatus of reclaiming etching liquid and method and apparatus of etching
2002–269405
N/A

N/A
Japan

19
The method of controlling the boiling chemical
2002–318730
2004–153164

N/A
Japan

20
The apparatus and the method of floating wafer chuck
2002–108651
2003–303871

N/A
Japan

21
The apparatus of wafer treatment and shaft
2003–47148
N/A

N/A
Japan

22
Etching method and equipment
2002–324795
2004–158746

N/A
Japan

23
Processing method and processing device before wafer inspection
2001–266653
2003–75312

N/A
Japan

24
Processing method and processing device before wafer inspection
2002–156835
2003–344243

N/A
Japan

25
Method for recirculating high–temperature etching soluthin
412444
N/A

4980017
USA

26
Method for purification of etching solution
305334
N/A

5470421
USA

Trademarks

Class of

NO
Trademark
goods
Designated goods

1 NISON
7
The apparatus of filtering recirculation etching liquid and other chemical machines and instruments

2 NISON
9
Automatic fluid– composition control machines and instruments

3 CENOTE
7
The apparatus of wafer etching, chemical machines and instruments

4 Stelna
7
The machines of chemical reaction and machines of separation, the chemical reclaiming etching apparatus, and other chemical machine and instruments.

Remark An application shall designate one or more items of goods on which the trademark is to be used, in one class of the classification of goods, prescribed by Cabinet Order.

Product
Product Name

Description

Spin Processor CENOTE
Single Wafer Wet Station

Best

                Wafer Backside Etcher

Wet Station

Immersion Process System

Field of Use
Products means any and all products, systems and subsystems now or hereafter produced by or under control of Licensee based upon the Technical Information given under this Agreement which are in the field of surface conditioning, cleaning, etch and stripping technology such as the Technical Information used in the products to this Agreement and any products, systems and subsystems to be used in the Field which will be developed, designed or invented, or otherwise acquired by Licensor in the future during the term of this Agreement.

IPSCIO Record ID: 27673

License Grant
Licensor hereby grants and agrees to grant to Licensee, effective upon license Effective Date, a world-wide, non-exclusive, non-transferable, perpetual, irrevocable, fully paid up and royalty-free license, without the right to sublicense, under the Licensor's Intellectual Property Rights, to make, use, sell, offer for sale, import or otherwise commercialize or exploit Licensed Products, to use the Licensor's Technology in connection with the foregoing, and to otherwise operate Licensee and commercialize its products as contemplated in the Master Agreement. It is understood that the foregoing license to Licensee includes, without limitation, the right to change and make improvements and extensions to the Licensor's Technology. Furthermore, it is understood that Licensee shall have the right to commercially exploit such changes and improvements in accordance with such license.  This is to be used in the manufacture of Licensee's solar modules.  

Subject to exceptions in this Agreement, Licensee shall pay royalties to Licensor for the use of MNIP. The royalty shall be based on two main elements the success of the relevant MNIP in achieving Cost Savings and the success of that MNIP in achieving Added Value.  MNIP means Material New IP.

Licensed Products means Wafers, Cells, and/or Modules, as the case may be, in which the Wafers are made using String Ribbon Technology.

License Property
The Licensor develops and manufactures multi-crystalline silicon wafers utilizing String Ribbon™ proprietary wafer technology. The technology involves a unique process to produce multi-crystalline silicon wafers by growing thin strips of silicon that are then cut into wafers. This process substantially reduces the amount of silicon and other processing costs required to produce a wafer when compared to conventional sawing processes. Silicon is the key raw material in manufacturing multi-crystalline silicon wafers. The wafers they produce are the primary components of photovoltaic “PV” cells which, in turn, are used to produce solar panels.

Licensed Products means Wafers, Cells, and/or Modules, as the case may be, in which the Wafers are made using String Ribbon Technology.  This is to be used in the manufacture of Licensee's solar modules.  The Licensor develops and manufactures multi-crystalline silicon wafers utilizing String Ribbonâ„¢ proprietary wafer technology. The technology involves a unique process to produce multi-crystalline silicon wafers by growing thin strips of silicon that are then cut into wafers. This process substantially reduces the amount of silicon and other processing costs required to produce a wafer when compared to conventional sawing processes. Silicon is the key raw material in manufacturing multi-crystalline silicon wafers. The wafers they produce are the primary components of photovoltaic (“PV”) cells which, in turn, are used to produce solar panels (also referred to as solar modules).

IPSCIO Record ID: 116322

License Grant
Licensor grants to the Japanese Licensee and its Affiliates an irrevocable license to utilize the Technology in connection with Licensors and its Affiliates use of the SIMOX Implanter and any additional Licensor oxygen implanters purchased or leased by Licensee for the purpose of manufacturing SIMOX Wafers.

The Japanese Licensee is purchasing from Licensor an 1000 SIMOX Implanter.

License Property
The SIMOX Implanter is the 210keV, 60mA 0+ 1000 Implanter with fill automated cassette load lock purchased by Licensee from Licensor.

SIMOX Wafers means polished, single-crystalline silicon wafers into which oxygen ions are implanted by the SIMOX Implanter or any additional Licensor oxygen implanter purchased or leased by Licensee utilizing the Standard SIMOX and/or Advantox-TM- processes.

Separation by implantation of oxygen (SIMOX), is a form of silicon-on-insulator (SOI) technology that creates an insulating oxide barrier below the top surface of a silicon wafer through implantation and annealing.

Field of Use
This agreement is for the semiconductor industry.

IPSCIO Record ID: 280974

License Grant
Licensor and German Licensee are parties to certain litigation involving the 761 patent.

With this interim patent license, the Licensor grants to the German Licensee a non-exclusive, non transferable worldwide license under the Patent Rights, without the right to grant sublicenses, to make, have made, use, sell, offer for sale, and import Licensed Products during the Term of this Agreement.

License Property
Licensor is the owner of patents relating to wet processing of semiconductors.

Licensed Products shall mean drying equipment, wet bench products, and replacement parts .

Dryer Module shall mean drying equipment in an enclosed, self-contained, physically separate unit which performs rinsing and drying but no chemical treatment operation.

Field of Use
The field of use is the semiconductor wet processing business.

IPSCIO Record ID: 227244

License Grant
The Licensor and Chinese Licensee agree to amend the License Agreement to provide for a different royalty payment calculation and to add and/or clarify certain additional terms and conditions.
License Property
The parties confirm and clarify that LIC/Wafer shall mean any single integrated circuit die and/or piece of silicon wafer designed and/or manufactured.  

0.25(micron) LIC/Wafers means all LIC/Wafers that are manufactured for any of the TSMC 0.25(micron) processes and TSMC 0.25(micron) derivative processes.

0.18(micron) LIC/Wafers means those LIC/Wafers that are manufactured for any of the TSMC 0.18(micron) processes and TSMC 0.18(micron) derivative processes.

0.15(micron) LIC/Wafers means those LIC/Wafers that are manufactured for any of the TSMC 0.15(micron) processes and TSMC 0.15(micron) derivative processes.

Field of Use
This agreement pertains to the semiconductor industry.

IPSCIO Record ID: 202872

License Grant
Licensor agrees to grant twenty (20) compiler tokens to the Singapore Licensee.
License Property
The licensed property is wafer manufactured at Licensee that incorporates any Licensee/Licensor 0.35um/0.25um memory compilers or wafers.

The memory compilers included are
• 0.35nm process
(i) 1 port High density compiler
• 0.25nm process
(i) 1 port High Density compiler (HD-Family)
(ii) 2 port High density compiler (HD-Family)
(iii) 1 port Register file
(iv) 2 port Register file

Field of Use
This agreement is for the semiconductor industry.

IPSCIO Record ID: 177530

License Grant
The Licensor hereby grants Licensee of Singapore an exclusive license in the territories to use Licensors Wafer Technology to carry on its Business. Licensee may not sublicense Licensors Wafer Technology without first obtaining the written consent of Licensor.
License Property
Licensor is in the business of polishing and reclamation of semiconductor wafers and the brokering of semiconductor wafers used in the electronic industry   Licensor possesses valuable industrial, marketing and commercial information regarding the conduct of the Business to be conducted by Licensee including, without limitation, drawings, formulae, test reports, operating and test procedures, instruction manuals, tables of operating conditions, administration procedures, marketing methods and procedures, advertising copy and computer software programs relating to and/or used in connection with the Business (the 'Licensors Wafer Technology')
Field of Use
Licensee is in the business of polishing and reclamation of semiconductor wafers and the brokering of semiconductor wafers used in the electronic industry.  Licensor and SPM (i) may use Licensors Wafer Technology to the extent that they are conducting business in the Territories on or before the date on which Licensees facility in Singapore commences commercial production and (ii) a Proposing Party may require Licensee to grant a non-exclusive sublicense (but  without the right to sublicense) of Licensors Wafer Technology licensed to Licensee hereunder and to Licensees Wafer Technology to a Relevant Investment Entity, but only for use in such country or countries in the Territories in which such Relevant Investment Entity establishes a facility which uses Licensors Wafer Technology and Licensees Wafer Technology.

IPSCIO Record ID: 4483

License Grant
The original Licensee entered into a related-party patent and technical support agreement with Licensor.  A US based company recently purchased Licensee and will be bound by the original licensee.
License Property
The licensed technology is used for electroplated wafer bumping and turnkey wafer level 'chip scale' packaging, together with installed and operationally qualified, high volume 200mm and 300mm electroplated wafer bumping and wafer level packaging manufacturing operations. This is 'back-end' wafer level processing technologies including wafer level CSP, electroplated lead-free and low alpha wafer bumping, fine pitch solder bumps, redistribution, and multi-layer thin film capabilities.  Flip chip is already a conventional packaging technology for microprocessors and is becoming mainstream for graphics, ASICs and chipsets.
Field of Use
The new Licensee is one of the world’s leading providers of outsourced semiconductor packaging and test services.

IPSCIO Record ID: 2299

License Grant
This licensing agreement will allow access to a variety of Licensor's advanced sub-micron processes for use in Licensee's wafer  fabrication  facility as  desired,  if and when those processes are  developed by Licensor.  The  arrangement  will enable access ultimately to Licensor's 0.10-micron process technology. We expect these advanced process  technologies to accelerate the development of high performance digital and mixed-signal products.  This agreement was restructured in 2003.

IPSCIO Record ID: 189170

License Grant
The University and Licensee entered an exclusive license to make, have made, use, sell, or any combination of the Licensed Products and Licensed Processes in the Field of Use and the Licensed Territory.  Additionally Licensor granted to Licensee a limited exclusive eighteen month option to license Optioned Technologies Patent Rights.
License Property
The Licensed Technologies Patent Rights are for Compounds Containing Tetra-deca-chloro-cyclo-hexasilane Dianion; Method of Forming Functionalized Silanes; Method of Producing Polyalkylated Oligoalkylenepolyamines; and Method of Producing Cyclohexasilane Compounds.

The Optioned Technologies Patent Rights are for Liquid Silane-Based Compositions and Methods for Producing Silicon-Based Materials; Liquid Silane-Based Compositions and Methods of Fabrication; Method and Apparatus for Aerosol Direct Write Printing; Synthesis of Silicon Containing Materials Using Liquid Hydrosilane; Compositions through Direct Injection; Silicon Materials from the Processing of Liquid Silanes and Heteroatom Additives; Synthesis of SI-Based Nano-Materials using Liquid Silanes; Production of 1-Dimensional Supramolecular Assemblies Comprised of Cyclopentasilane and  Cyclohexasilane Rings Linked by Atoms, Molecules, and Ions; and Surface Modified Silicon Quantum Dots.

Field of Use
Licensee creates technology based solutions, products and services, that address energy-related market needs globally.  Licensees underlying technology is based on the production of a high value liquid silicon precursor, cyclohexasilane, CHS, for materials commonly used for manufacturing silicon-based semiconductors and solar cells.

IPSCIO Record ID: 3598

License Grant
The Company entered into an additional Agreement acquiring an Exclusive License to manufacture, sell and provide services and parts support for certain reactive ion etch semiconductor manufacturing equipment for wafer sized up to 200mm now marketed under the ASI trade names Arista and Arista Dual.
License Property
Products as used herein shall mean certain reactive ion etch semiconductor manufacturing equipment for wafer sizes up to 200mm under the trade names Bobcat 209 or Cheetah (limited to such equipment that includes at least one reactive ion etch chamber) including software, components and parts therefor.
Field of Use
Dry strip semiconductor manufacturing equipment As part of the chip creation process, a light sensitive, polymer-based liquid, called photoresist, is spread in a uniformly thin film on the wafer in pattern creating a stencil effect. Photostabilization uses ultraviolet light to harden, or cure, the photoresist so that it is more effective in maintaining the desired pattern during the subsequent implant processes and etch steps (in which the top layer of the surface of the wafer not covered by photoresist is removed). After these steps, the photoresist is no longer.

IPSCIO Record ID: 227276

License Grant
The Parties have agreed to transfer and to license certain patents relating to wafer and/or reticle containers, Ports, material handling systems and/or Tracking Systems.  

Licensor hereby sells, assigns, transfers and otherwise conveys to Licensee Cayman the entire right, title and interest in and to the specific Patents and Applications identified and any foreign counterparts, and all other patents or applications that now or in the future claim priority to any Patent or Application identified.

Licensee and Licensee Cayman grant to Licensor and Licensors Subsidiaries a world-wide, fully paid, exclusive, non-transferable license, including the right to grant sublicenses, under all Exclusive Rights Patents owned or licensable by Licensee Cayman or Licensee to make, have made, use, sell, offer to sell, import, export, and otherwise dispose of, anywhere in the world, all products except Acquired Products.

Licensor grants to Licensee Cayman a a world-wide, fully paid, exclusive, non-transferable license, including the right to grant sublicenses, under all Combined Pod and Port Patents owned or licensable by Licensor to make, have made, use, sell, offer to sell, import, export, and otherwise dispose of, anywhere in the world, Acquired Products.

Licensee Cayman and Licensee grant to Licensor and Licensors Subsidiaries a a world-wide, fully paid, nonexclusive, non-transferable license under Pod and Carrier Patents owned or licensable by Licensee Cayman or Licensee to (a) conduct development, research, testing, or demonstration of Acquired Products, provided that Licensor does not transfer Acquired Products to third parties for purposes other than development, research, testing, or demonstration, and (b) to make, have made, use, sell, offer to sell, import, export, and otherwise dispose of, anywhere in the world, Non-Plastic Flat Panel Display Products.

Licensee Cayman and Licensee grant to Licensor and Licensors Subsidiaries a a world-wide, fully paid, nonexclusive, non-transferable license under all Port Patents, MHS Patents, Environmental Control Patents, and AutoID/Lot Tracking Patents owned or licensable by Licensee Cayman or Licensee to make, have made, use, sell, offer to sell, import, export, and otherwise dispose of, anywhere in the world, all products except Acquired Products.

Licensor grants to Licensee Cayman a a world-wide, fully paid, nonexclusive, non-transferable license under Pod and Carrier Patents, MHS Patents, Environmental Control Patents, and AutoID/Lot Tracking Patents owned or licensable by Licensor to make, have made, use, sell, offer to sell, import, export, and otherwise dispose of, anywhere in the world, Acquired Products.

License Property
Licensed Trademarks means the marks ASYST(R), A S Y S T(R), and A(R).

Pod and Carrier Patents means United States and foreign patents issued on or before the seventh anniversary of the Effective Date having claims directed to sealable, transportable containers, wafer and/or reticle carriers and containers, or components of wafer and/or reticle carriers and containers, including, but not limited to, the patents identified below.

US 4,739,882 – Container having disposable liners
US 4,815,912 – Box door actuated retainer
US 4,995,430 – Sealable transportable container having improved latch mechanism

Combined Pod and Port Patents means United States and foreign patents issued on or before the seventh anniversary of the Effective Date having claims directed to (a) the combined structure of a wafer or reticle container and a Port or (b) the operation of a wafer or reticle container and a Port, including, but not limited to, the patents identified.

Port Patents means United States and foreign patents issued on or before the seventh anniversary of the Effective Date having claims directed to the structure and/or operation of a Port.

MHS Patents means United States and foreign patents issued on or before the seventh anniversary of the Effective Date having claims directed to the structure and/or operation of a material handling system for transporting, storing, delivering and/or loading wafer and/or reticle containers or individual wafers in the manufacture of semiconductor devices, or components of such a system.

Environmental Control Patents means United States and foreign patents issued on or before the seventh anniversary of the Effective Date having claims directed to environmental control features of Ports for controlling the environment inside of wafer and/or reticle containers, including purging systems, including, but not limited to, the patents identified in this Agreement; provided, however, that Environmental Control Patents do not include patents with claims principally directed to environmental control features within wafer and/or reticle containers.

Autoid/Lot Tracking Patents means United States and foreign patents issued on or before the seventh anniversary of the Effective Date having claims principally directed to systems or components of systems used to track, identify, manage, control and route lots, carriers, wafers and/or reticlesduring the manufacture of semiconductors or semiconductor wafers, including, but not limited to, the patents identified.

Licensed Patents means Pod and Carrier Patents, Port Patents, Combined Pod and Port Patents, MHS Patents, Environmental Control Patents, and AutoID/Lot Tracking Patents.

Exclusive Rights Patents means the Patents and Applications identified in this Agreement and all foreign equivalents and counterparts, divisions, continuations, continuations-in-part, reexaminations, and reissues of such Patents and Applications.

Field of Use
This agreement pertains to the semiconductor industry.

IPSCIO Record ID: 6727

License Grant
The Parties have agreed to the joint development of semiconductor apparatus and processes relating to plating technology for advanced packaging and integration solutions in semiconductor processing and manufacturing. The Licensor has granted a license under its intellectual property rights to develop, make, have made and sell certain products.
License Property
Packaging Technology means any process, procedure, software, or hardware tools used in the packaging of Integrated Circuit products into single-chip packages, multi-chip packages, or any other higher levels of assembly.

IPSCIO Record ID: 315856

License Grant
Licensor grants an exclusive license for the life of the patents to use, import, export, sell and offer to sell, but not to make, any Licensor Materials supplied or developed under this Agreement, only in the Field.
License Property
Photomasks are high-purity quartz or glass plates containing precision images of integrated circuits and are used as masters by semiconductor manufacturers to optically transfer these images onto semiconductor wafers. Photomasks are a necessary component in the production of semiconductors.

Licensor is currently the only photomask manufacturer in the world that also manufactures photoblanks and pellicles, the principal components of photomasks.

Field of Use
The field is the area of advanced photomask technology, such as photomasks, blanks and pellicles.  The technology is used in photolithography for microelectronic applications, including pellicles for optical markets, and specifically the semiconductor industry.

IPSCIO Record ID: 4164

License Grant
The Licensor licensed to us TCP-related technology and intellectual property rights.
License Property
Tape Carrier Package Technology (TCP) offer a high number of inputs and outputs, a thin package profile and a smaller footprint on the circuit board, without compromising performance. Key package features include surface mount technology design, fine-pitch tape format and slide carrier handling. Because of their flexibility and high number of inputs and outputs, TCPs are primarily employed either for STN-LCD or TFT-LCD driver semiconductors.
Testing of tape carrier packages. We conduct full function testing of LCD and other flat-panel display driver semiconductors with a specially designed probe handler to ensure reliable contact to the test pads on the TCP tape. We can test STN-LCD or TFT-LCD driver semiconductors with frequencies of up to 750 MHz and at voltages up to 40V. The test is performed in a temperature-controlled environment with the device in tape form. The assembled and tested LCD and other flat-panel display driver semiconductors in tape form are packed between spacer tapes together with a desiccant in an aluminum bag to avoid contact during shipment.

Assembly of tape carrier packages. TCPs use a tape-automated bonding process to connect die and tape. The printed circuit tape is shipped with a reel. The reel is then placed onto an inner lead bonder, where the LCD or other flat-panel display driver semiconductor is configured onto the printed circuit tape. The resulting TCP component consists of the device interconnected to a three-layer tape, which includes a polyamide-down carrier film, an epoxy-based adhesive layer and a metal layer. The tape metallization area of the interconnections is tin plated over a metal layer. The silicon chip and inner lead area is encapsulated with a high temperature thermoset polymer after inner lead bonding. The back face of the chip is left un-sealed for thermal connection to the printed circuit board.

Field of Use
The Licensee provides gold bumping, testing and assembly services for LCD and other flat-panel display driver semiconductors by employing tape carrier package, or TCP, chip-on-film, or COF, and chip-on-glass, or COG, technologies.
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